Tektronix P6474 Overview

Number of Data Outputs –
16 in Full Channel Mode.
8 in Half Channel Mode.
Number of Clock Outputs – 1. (Only one of Clock Output and Strobe Output can be enabled
Number of Strobe Outputs – 1. (Only one of Clock Output and Strobe Output can be enabled
Clock Output Polarity – Positive.
Strobe Type – RZ only.
Strobe Delay – Zero or Trailing Edge.
Number of External Event Inputs – 2.
Number of External Inhibit Inputs – 1.
Output Type – 74AVC16244 for data, clock, strobe outputs.
Series Terminator Resistor – 75 O standard. 43, 100, and 150 O optional.
Rise/Fall Time (20% to 80%) –
Load: 1 MO + <1 pF
Rise: 1.2 ns
Fall: 610 ps typical
Load: 510 O + 20 pF
Rise: 3.4 ns
Fall: 3.2 ns
Output Voltage Level – 1.2 V to 3.3 V, 25 mV step, into 1 MO.
Data Output Skew –
<590 ps between all data output pins of all modules in the mainframe after inter-module skew isadjustedmanually
<500 ps between all data output pins of all probes of a single module.
<460 ps between all data output pins of a single probe.
Data Output to Strobe Output Delay – 460 ps when strobe delay set to zero.
Data Output to Clock Output Delay – 1.84 ns.
External Clock Input to Clock Output Delay – 55 ns.
External Inhibit to Output Enable Delay – 36 ns for data output.
External Inhibit Input to Output Disable Delay – 18 ns for data output.
Probe D Data Output to Output Enable Delay – 6 ns for data output.
Probe D Data Output to Output Disable Delay – 7 ns for data output.

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